Physical Specifications¶
Process Scheme (#Poly/#Metal) |
1P1M |
Device Type |
5V NMOS & 5V PMOS |
Drawn Gate Length PMOS/NMOS(um) |
0.50/0.60 |
Layer of Poly |
1 |
Well Option |
Outside DNWELL |
Layer Grid (um) |
0.005 |
Tracks per Cell |
9 |
Cell Height (um) |
5.04 |
Vertical/Horizontal Pin Grid (um) |
0.56 |